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publication order number: fan7085m-gf085/d ?2012 semic onductor components industries, llc. september-2017,rev.2 FAN7085-GF085 high side gate driver with recharge fet f an7085-gf085 high side gate driver with recharge fet features ? qualified to aec q100 ? floating channel designed for bootstrap operation fully oper - ational up to 300v. ? tolerance to negative transient voltage on vs pin ? dv/dt immune. ? gate drive supply range from 4.5v to 20v ? under-voltage lockout ? cmos schmitt-triggered inputs with pull-down and pull-up ? high side output out of phase with input (inverted input) ? reset input ? internal recharge fet for bootstrap refresh typical applications ? diesel and gasoline injectors/valves ? mosfet-and igbt high side driver applications ? ? description the FAN7085-GF085 is a high-side gate drive ic with reset input and built-in recharge fe t. it is des igned for high voltage and high speed driving of mosfet or igbt, which operates up to 300v. on semiconductor 's high-voltage process and common-mode noise cancellation technique provide stable operation in the high side driver under high-dv/dt noise circumstances. logic input is compatible with standard cmos outputs. the uvlo cir-c uits prevent from malfunction when vcc and vbs are lower than the specified threshold voltage. it is available with space saving soic-8 package. minimum source and sink current capability of output driver is 250ma and 250ma. built-in recharge fet to refresh bootstrap circuit is very useful for circuit topology requiring switches on low and high side of load. soic-8 ordering information device package operating temp. fan7085m-gf085 so ic-8 -40 ? c ~ 125 ? c fan7085mx-gf085 so ic-8 -40 ? c ~ 125 ? c x : tape & reel type
www.onsemi.com 2 FAN7085-GF085 high side gate driver with recharge fet block diagrams vcc under voltage reset vcc to gnd logic pulse filter level shifter on level shifter off delay under voltage reset vb to vs pulse filter flip flop brake before make reset- in- gnd vs ho vb recharge path pin assignments 1 2 3 4 5 6 7 8 vcc in gnd reset vs nc ho vb pin definitions pin number pin name i/o pin function description 1 vcc p driver supply voltage, typically 5v 2 in- i driver control signal input (negative logic) 3 gnd p ground 4 reset- i driver enable input signal (negative logic) 5 vs p high side floating offset fo r mosf et sour ce connection 6 nc - no connection (no bond wire) 7 ho a high side drive output for mosfet gate connection 8 vb p driver output stage supply
www.onsemi.com 3 FAN7085-GF085 high side gate driver with recharge fet absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage parameters are abso - lute voltages referenced to gnd. parameter symbol min. max. unit high side floating supply voltage v b s -0.3 25 v high side driver output stage voltage neg. transient: 0.5 ms, external mosfet off v b -5 325 v high side floating supply offset voltage neg. transient 0.2 us vs -25 300 v high side floating output voltage v ho vs-0.3 vb+0.3 v supply voltage v cc -0.3 25 v input voltage for in- v in -0.3 vcc+0.3 v input voltage for reset- v res -0.3 vcc+0.3 v power dissipation 1) pd 0.625 w thermal resistance, junction to ambient 1) rthja 200 ? c/w electrostatic discharge voltage (human body model) v esd 1.5k v charge device model v cdm 500 v junction temperature tj 150 ? c storage temperature t s -55 150 ? c note: 1) the thermal resistance and power dissipation rating are measured bellow conditions; jesd51-2: integrated circuit thermal test method en vironmen tal conditions - natural condition(stillair) jesd51-3: low effective thermal conductivity test board for leaded surface mount package recommended operat ing conditions for proper operation the device should be used within the recommended conditions parameter symbol min. max. unit high side floating supply voltage(dc) transient:-10v@ 0.2 us v b vs+4.5 vs+20 v high side floating supply offset voltage(dc) @vbs=7v v s -3 300 v high side floating supply offset voltage(tr ansient) 0.2us @vbs<25v v s -25 300 v high side floating output voltage v ho vs vb v allowable offset voltage slew rate 1) dv/dt - 50 v/ns supply voltage for logic part v cc 4.5 20 v input voltage for in- v in 0 vcc v input voltage for reset- v reset 0 vcc v switching frequency 2) fs 200k hz minimum low input width 3) t in(low,min) 560 - ns minimum high input width 3) t in(high,min) 60 - ns minimum operating voltage of vb related to gnd v b (min) 4) 4 - v ambient temperature t a -40 125 ? c .-40c <= ta <= 125 c note: 1) guaranteed by design. 2) duty = 0.5, vbs >=7v 3) guaranteed by design. pulse widths below the specified values, may be ignored. output will either follow the input signal or will ignore it. no false output state is guaranteed when minimum input width is smaller than tin 4) guaranteed by design
www.onsemi.com 4 FAN7085-GF085 high side gate driver with recharge fet statics electrical characteristics unless otherwise specified, -40c <= ta <= 125 c, v cc = 5v, v bs = 7v, v s = 0v, v reset = 5v, r l = 50? , c l = 2.5nf. parameter symbol conditions min. typ. max. unit vcc and vbs supply characteristics v cc and v bs supply under voltage positive going threshold v ccuv+ v bsuv+ v cc and v bs rising from 0v - 3.7 4.3 v v cc and v bs supply under voltage negative going threshold v ccuv - v bsuv- v cc and v bs dropping from 5v 2.8 3.4 - v v cc and v bs under voltage hysteresis v ccuvh v bsuvh - 0.02 0.3 - v under voltage lockout response time tduvcc tduvbs vcc: 6.5v->2.4v or 2.4v->6.5v vbs: 6.5v->2.4v or 2.4v->6.5v 0.5 0.5 20 20 us us offset supply leakage current i lk vb=vs=300v - - 200 ua quiescent vcc supply current i qcc v cc =20v - - 500 ua quiescent vbs supply current i qbs1 static mode, v bs =7v, v in =0 or 5v 100 ua quiescent vbs supply current i qbs2 static mode, v bs =16v, v in =0 or 5v 200 ua vbs drop due to output turn-on (design guaranty) ? v bs v bs =7v, cbs=1uf, td ig-in =3us, t test =100us 210 mv input characteristics high logic level input voltage for in- v ih 0.6v cc - - v low logic level input voltage for in- v il - - 0.28v cc v low logic level input bias current for in- i in- v in =0 5 25 60 ua high logic level input bias current for in- i in+ v in =5v - - 5 ua full up resistance at in r in 83 200 1000 ?? high logic level input voltage for reset- v rh 0.6vcc - - v low logic level input voltage for reset- v rl 0.28vcc v high logic level input current for reset- i res+ v reset =5v 5 25 60 ua low logic level input bias current for reset- i res- v reset =0 5 ua full down resistance at reset- r res 83 200 1000 ?? output characteristics high level output voltage, v b - vho v oh i o =0 - - 0.1 v low level output voltage, vho-gnd v ol i o =0 - - 0.1 v peak output source current i o+ v in =5v 250 450 - ma peak output sink current i o- v in =0 250 450 - ma equivalent output resistance r op 15.5 28 ? r on 15.5 28 ? recharge characteristics recharge tr turn-on propagation delay t on_rech 4 7.9 9.8 us recharge tr turn-off propagation delay t off_rech 0.2 0.4 us recharge tr on-state voltage drop v rech is=1ma, vin=5v @125 ? c 1.2 v dead time characteristics high side turn-off to recharge gate turn-on d thoff v cc =5v, v s =7v 4 7.8 9.8 us recharge gate turn-off to high side turn-on d thon v cc =5v, v s =7v 0.1 0.4 0.7 us note: the input parameter are referenced to gnd. the vo and io parameters are referenced to gnd.
www.onsemi.com 5 FAN7085-GF085 high side gate driver with recharge fet dynamic electrical characteristics unless otherwise specified, -40c <= ta <= 125 c, v cc = 5v, v bs = 7v, v s = 0v, v reset = 5v, r l = 50? , c l = 2.5nf. parameter symbol conditions min. typ. max. unit input-to-output turn-on propagation delay t plh 50% input level to 10% output level, v s = 0v 0.56 1 us input-to-output turn-off propagation delay t phl 50% input level to 90% output level v s = 0v - 0.15 0.5 us reset-to-output turn-off propagation delay t phl_res 50% input level to 90% output level - 0.17 0.5 us reset-to-output turn-on propagation delay t plh_res 50% input level to 10% output level - 0.56 1 us output rising time tr1 tj=25 ? c - 65 200 ns tr2 - 400 ns tr3 tj=25 ? c,v bs =16v 65 200 ns tr4 v bs =16v - 400 ns output falling time tf1 tj=25 ? c - 25 200 ns tf2 - 300 ns tf3 tj=25 ? c,v bs =16v 25 200 ns tf4 v bs =16v - 300 ns
www.onsemi.com 6 FAN7085-GF085 high side gate driver with recharge fet application information 1. l ogic tables vcc vbs reset - in- ho rechfet < vccuvlo- x x x off on x x low x off on x x x high off on > vccu vlo+ > vbs uvlo+ high low on off > vccu vlo+ < vbsuvlo- high low off off notes: x means independent from signal in-=low indicates that the high side nmos is on in-=high indicates that the high side nmos is off rechfet =on indicates that the rec harge mosfet is on rechfet =off indicates that the recharge mosfet is off
www.onsemi.com 7 FAN7085-GF085 high side gate driver with recharge fet typical application circuit vcc in- gnd reset- vb ho nc vs c1 r1 r2 c2 vcc c3 d1 up to 300v load 1. t ypical application circuit vcc in- gnd reset- vb ho nc vs c2 c1 r1 r2 r3 r4 c3 5v from charge pump voltage source c4 load gnd from ls driver s1 s2 d3 d4 d5 2. applicat ion example
www.onsemi.com 8 FAN7085-GF085 high side gate driver with recharge fet input-output waveforms t off_rech t on_rech t phl in- reset- vs vho recharge t plh 10% 90% 90% 10% tr tf figure.1 input and output timing diagra m and switching time waveform definition 1. input /output timing diagrams 2. reset t iming diagrams t phl_res tplh _res in- reset- vho figure.2 reset and output timing diagram
www.onsemi.com 9 FAN7085-GF085 high side gate driver with recharge fet 3.vb drop voltage diagram vb drop in- reset- vb-vs i g 7v brake before make vcc in- gnd reset- vb ho nc vs 1u 50r 2n5 ig figure3.b vb drop voltage test circuit figure3.a vb drop voltage diagram 4.recommendation min. short pulse width figure 4a. short pulse width test circuit and pulse width waveform figure 4b. abnormal output wa veform with short pulse width figure 4c. recommendation of pulse width output waveform bat1 1 2 4 5 6 7 8 3 vcc in reset n.c vs ho vb com bat2 0.1uf fan7085 in 60% 28% tpulse =560ns less than 430ns pulse width 142 khz in ho abnormal output recommended pulse width 560ns 142 khz ho in
www.onsemi.com 10 FAN7085-GF085 high side gate driver with recharge fet performance graphs 4.4 4.7 5.0 5.3 5.6 5.9 6.2 6.5 2.2 2.4 2.6 2.8 3.0 3.2 typ. vinth+ (v) vsupply (v) figure 5a. positive in and reset thr eshold vs vcc supply figure 5b. negative in and reset threshold vs vcc supply figure6b. output source current vs temperature figure 7a. turn-on propagation delay time vs temperature figure 7b. turn-off propagation delay time vs temperature figure6a. output sink current vs vbs supply vbs=7v, rl=50, cl=2.5nf 4.4 4.7 5.0 5.3 5.6 5.9 6.2 6.5 1.8 2.0 2.2 2.4 2.6 typ. vinth- (v) vsupply (v) 51 01 52 0 0 400 800 1200 1600 2000 125 o c output sink cureent (ma) vbs(v) -40 o c -50 0 50 100 150 300 350 400 450 500 typ. output source cureent (ma) temperature ( o c) -50 0 50 100 150 500 530 560 590 620 650 turn-on propagation delay (ns) temperature( o c) typ. -50 0 50 100 150 100 150 200 250 turn-off propagation delay (ns) temperature ( o c) typ. vbs=7v, rl=50, cl=2.5nf vcc=5v, vbs=7v vcc=5v vcc=5v,vbs=7v, rl=50, cl=2.5nf vcc=5v,vbs=7v, rl=50, cl=2.5nf this performance graphs based on ambient temperature -40 ? c ~125 ?c
-50 0 50 100 150 100 150 200 250 typ. res-to-output turn-off propagation delay (ns) temperature ( o c) -50 0 50 100 150 500 550 600 650 700 typ. res-to-output turn-on propagation delay (ns) temperature ( o c) figure 8a. res to output turn-on propagation delay vs temperature figure 8b. res to output turn-off propagation delay vs tempera tur figure 10. logic ?1? reset in put current vs temperature figure 11a. vbs under voltage threshold(+) vs temperature figure 11b. vbs under voltage threshold(-) vs temperature figure 9. logic ?0? in input current vs temperature vcc=5v, vbs=7v, rl=50, cl=2.5nf vcc=5v, vbs=7v, rl=50, cl=2.5nf -50 0 50 100 150 0 10 20 30 40 50 logic "0" input current ( ua ) temperature ( o c) typ. -50 0 50 100 150 0 10 20 30 40 50 typ. logic "1" res input current ( ua ) temperature ( o c) vcc=5v, rl=50, cl=2.5nf vcc=5v, rl=50, cl=2.5nf -50 0 50 100 150 2.0 2.5 3.0 3.5 4.0 4.5 5.0 min. max. typ. v bs supply voltage(v) temperature( o c) -50 0 50 100 150 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v bs supply voltage(v) temperature( o c) max. typ. min. www.onsemi.com 11 FAN7085-GF085 high side gate driver with recharge fet
figure 12a. vcc under voltage threshold(+) vs temperature figure 12b. vcc under voltage threshold(-) vs temperature figure 13. recharge fet turn-on delay time figure 15. recharge fet i-v curve figure 14. recharge fet turn-off delay time vbs=7v -50 0 50 100 150 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v cc supply voltage(v) temperature( o c) max. typ. min. -50 0 50 100 150 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v cc supply voltage(v) temperature( o c) max. typ. min. -50 0 50 100 150 4 6 8 10 typ. recharge transistor turn-on propagation delay (us) temperature( o c) -50 0 50 100 150 140 180 220 260 300 typ. recharge gate turn-off propagation delay (ns) temperature ( o c) 0.4 0.6 0.8 1.0 1.2 0.2 0.6 1.0 1.4 1.8 i ( ma ) v (v) typ. -50 0 50 100 150 4 6 8 10 typ. high side turn-off to recharge gate turn-on (us) temperature ( o c) figure 16. high side turn-off to recharge fet turn-on vs temperature vcc=5v, vbs=7, vrl=50, cl=2.5nf vcc=5v, vbs=7v, rl=50, cl=2.5nf vcc=5v, vbs=7v, rl=50, cl=2.5nf vcc=5v, vbs=7v, rl=50, cl=2.5nf www.onsemi.com 12 FAN7085-GF085 high side gate driver with recharge fet
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